<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Digital-Twin on Manuj Gupta</title><link>https://manujg.com/tags/digital-twin/</link><description>Recent content in Digital-Twin on Manuj Gupta</description><image><title>Manuj Gupta</title><url>https://manujg.com/images/social-cover.png</url><link>https://manujg.com/images/social-cover.png</link></image><generator>Hugo</generator><language>en-us</language><lastBuildDate>Tue, 10 Mar 2026 00:00:00 +0000</lastBuildDate><atom:link href="https://manujg.com/tags/digital-twin/index.xml" rel="self" type="application/rss+xml"/><item><title>Rapid Prototyping: A Digital Twin for STM32H7 ADC Metrology</title><link>https://manujg.com/lab/stm32h7-adc-digital-twin/</link><pubDate>Tue, 10 Mar 2026 00:00:00 +0000</pubDate><guid>https://manujg.com/lab/stm32h7-adc-digital-twin/</guid><description>Before you spin a PCB, you should know whether your hardware choices will meet your accuracy targets. Here is a look at how I used AI to rapidly build a digital twin of the STM32H7 ADC to visualize these constraints.</description></item></channel></rss>